The Triumphant Return of the Ragebridge: RageBridgeTwo

Friday, September 14th, 2012 @ 3:02 | Motor Controllers, Project Build Reports

First, in accordance with the Charles Z. Guan Strategic Stuff Reduction Act of 2012, I’ve opened up a listing page of things I’m clearing out. Let me know if you want a thing. As I continue mining through my multiple mid-dens, more things may be added.

Now, onto the real content.

With the version 1 of the Ragebridge controllers having proven themselves at Robot Battles 2012 (after being the stuff of nightmares prior to that), and now that I understand what I’ve been doing wrong the whole time, it’s time for me to make an update which addresses the little shortcomings and fine details that were lacking in version 1. Recall the major hardware issues:

  1. Gate driver bypass caps were placed incorrectly, thus causing the gate drive power traces to have higher impedance to pulsed currents, with the resultant voltage spikes some times causing instability.
  2. Gate drive current return path was long and loopy: through the main power ground, and back in through the narrow logic regulator trace.
  3. Non-rotationally symmetric current sensor placement meant there was a major current bottleneck for one side
  4. Long power traces in general made for more bottlenecks
  5. The logic regulator inductor was (and apparently has been in many of my past designs) too small which caused the regulator to become unstable.

Luckily they were all solvable with component-level hacks (no more wire cutting and trace jumping!) so I can easily roll them up into an upgrade. Next, there were a few little gripes I wanted to resolve which didn’t impact the function of the board so much as was just annoying.

  1. None of the 3-pin digital input headers had the correct orientation for standard servo cables. I had intended to make 2 of them “potentiometer” style inputs, reading [5v] [Signal] [Ground] from one side to the other, and 2 of them R/C style inputs reading [Signal][5V][Ground], but messed up (and didn’t check), making the latter two [Signal][Ground][5V] instead. Basically this meant I had to hard-solder pigtails to the board so as to not plug in a normal servo cable and explode everything.
  2. The board is 2.2″ wide, which precluded it from fitting vertically (space-saving) in a 2″ frame, fairly standard for the 12 and 30lb classes. Only Clocker could fit it vertically in a custom little “rack”.
  3. It still uses that ATMEGA328 breakout board called the Arduino Nano. Not only is that kind of unnecesary, but the thru-hole package of the Nano actually makes routing pretty difficult since I have to fit signal traces between the thru-holes.
  4. I could only read 60A peak with the “single bypassed” ACS714 current sensors. With a little help from a fan (and maybe 4oz copper) I don’t doubt this board can flow more than that.

With these issues in mind, the goals for RB2 were clear:

  • Squish the design down to 2″ wide maximum
  • Rebuild the schematic from scratch to eliminate possible cross-generation schematic copying problems, which is what led to my incorrectly placed buscaps and ignorance of the logic regulator problem for so long.
  • Widen all the power traces and make sure all the gate drive traces have their own low-impedance path back to the driver chip and the power supply
  • Make the current sensors “double bypassable” to read peak currents up to 90A and make the layout as much of a 180 degree rotation as possible to preserve the bottleneck-free layout.
  • Board-mount the ATmega328! It’s still going to be Arduino, but I’ll forego the extra $12-20 breakout board.

It’s also important to note that RB has been printed on 1oz copper using the cheap prototyping service from MyroPCB. Even moving to 2oz copper would help alot with the current bottlenecks. Ideally I’d try to get it fabbed from 4oz copper.

Here’s the first shot of the layout progress. The master layout remains essentially the same. The board is now 4.5″ long and 2″ wide:

Beginning the layout is usually the hardest for me because that’s when the problem is totally unconstrained. I usually jiggle the major power components around in a rough grid snap (to ensure reproduceability) first. After that, I usually work from the “outside in” – gate drive components get arranged next, then the logic fills in the loose volume. I’ve gotten all the way to the “so, where to put the logic components?” stage here, so they remain in a formless blob in the center. It does show that I have space to play with however.

For the ATMEGA chip, I knocked a footprint and schematic symbol from the Sparkfun Electronics library. The one difference is that I added to the ATMEGA’s pin names in the schematic their equivalent analog and digital pins when the chip is brainwashed into Arduino mode. This just makes mapping from old to new schematic easier. I’ll update my EAGLE Library under the Useful Stuff / references page with this device.

There’s one more little detail about this board, but I’ll keep going for now. Let’s see if you can figure it out.

I’ve now added some of the major power planes and a logic ground plane. One of the things I’ve never done in the past is a logic ground plane, for some reason. It makes trying to tie all the ground nets together so easy! And a wide plane is lower impedance than narrow 10 mil wide traces hopping through 9 vias. I just had to be careful with the bottom-layer traces not cutting the plane in half or totally isolating a ground pad, which would defeat the purpose.

The big SMT 6 pin header has disappeared – it just took up too much floorspace.

A few hours later, the first round of iteration is complete. Really I should send the board out to manufacture right now…

…but I decided to wait a while this time. I didn’t do anything with the board for about 2 days, upon which I returned and started optimizing. The differences are very minor, mostly in component fine placement. There’s now plenty of room to attach standoffs to the board at its mounting holes. Furthermore, the mounting holes have been made into a slightly smaller square that is the same size as a 52mm DC fan’s mounting pattern. This means I should be able to get some active…. microcontroller? cooling going on with this board.

Even though I say microcontroller (the ATMega would be receiving the best airflow in the house), almost any airflow at all would make the FETs’ thermal resistance to ambient air lower and hence increase the current rating of the board. Maybe there’s enough space to fiddle with putting a temp sensor on it…

Alright, one more layer of optimization. I’ve organized the top row of parts, which are 15v logic supply regulator related, into a better arrangement. Previously, they were extremely close together (soldering would have been difficult and hell if an IR lamp can reflow the pads in the dark alleyways of my L/C skyscrapers). I’ve space them apart alot more, but that involved moving the regulator chip itself down. This in turn meant I needed to shift some passives around. Whatever, the component density has only increased as a result.

(Now, none of this would be a problem if I would only use 0603 or 0402 SMT parts, but I’m too heavily invested in 1206 and fuck people with good eyesight.)

That is pretty much the final version of the board as it stands. With each of these revisions, I was sending it off to Advanced Circuit’s FreeDFM service in order to double check that it can actually be printed. I also ran a full Design Rule Check every time I changed a bunch of things between iterations. This was mostly me clicking “Approve” to all my vias-in-pads and insufficient solder mask clearances, but it did catch a few too-close-spacings.

Speaking of vias-in-pads, apparently they’re generally discouraged in automated PCB assembly, so in the interest of possibly getting this board professionally stuffed, I went through all the difficult tunneling in the gate drive and tried to un-pad my vias, at least connecting them to the pad with a short neck trace if possible.

This is a picture showing the VSS (everything-power-return) highlighted. Each gate drive now has its own private access to VSS at the location of the FET. This makes sure that 8 switching current pulses aren’t trying to octo-penetrate the thin logic regulator supply trace at the right in order to get back to the regulator. While it “worked” in RB version 1, it’s definitely not optimal. This general idea of not having signals mix with power is called Kelvin connecting, after the dude who first used it to sense very small voltages.

Highlighted now is the 15 volt distribution bus, which I’ve made strictly tree shaped this time. I try to adhere to the rule that any time power is being dealt with, closed loops are a bad idea.

The 5 volt bus follows a similar tree structure.

The large ground plane, which is the logic return path, is actually not a closed loop either. On the lower left corner, it was purposefully broken by judicious gate drive trace routing. It’s topologically a big mirrored C shape with the ends of the C right at the regulator output.

I’m pulling out all the stops I know to make sure that this board works on the first try. Ideally I’d get this sent to manufacturing through Myro tomorrow and have it ship right before Maker Faire 2012 in New York. This will probably be my on and off diddling project for most of the semester as a result. If it works out, I am now much less opposed to letting a few out “in the wild” for testing and subsequently investigating how much it would cost for Myro to just assemble all the parts, minus cables and through-hole pin headers and capacitors, for me.

To make it easier for them, I’ve placedallthe parts on the top side. That was the surprise – go back and look at the first few pictures now. Notice how all the parts are red (top layer)?

Now, all top side parts doesn’t instantly mean manufacturable. Once I build a few I might find where problem areas are. Say, anyone know if you can tell pick-and-place machines to put on the short and flat parts first?

 

 

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